Type Members

1.  class AddImplicitOutputFile extends Phase

   Phase that adds an OutputFileAnnotation if one does not already exist.

   Phase that adds an OutputFileAnnotation if one does not already exist.

   To determine the OutputFileAnnotation, the following precedence is used. Whichever happens first succeeds:

   • Do nothing if an OutputFileAnnotation "--split-verilog" was specified
   • Use the main in the first discovered FirrtlCircuitAnnotation (see note below)
   • Use "a"
2.  class CIRCT extends Phase

   A phase that calls and runs CIRCT, specifically firtool, while preserving an AnnotationSeq API.

3.  class Checks extends Phase

   Check properties of an firrtl.AnnotationSeq! to look for errors before running CIRCT.