object HarnessCompilationFlags
A namespace for flags affecting which code in the harness is compiled.
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- Backend.scala
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- val backendEngagesInASLRShenanigans: String
VCS first checks whether address-space layout randomization (ASLR) is enabled, and if it is, _helpfully_ relaunches this executable with ASLR disabled.
VCS first checks whether address-space layout randomization (ASLR) is enabled, and if it is, _helpfully_ relaunches this executable with ASLR disabled. Unfortunately, this causes code executed prior to
simulation_main
to be executed twice, which is problematic, especially since we redirectstdin
andstdout
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- val enableFsdbTracingSupport: String
- val enableVCSSupport: String
This flag controls if VCS-specifc code is compiled.
- val enableVcdTracingSupport: String
Flags enabling various tracing mechanisms.
Flags enabling various tracing mechanisms. Note: These flags do not cause tracing to occur, they simply support for these tracing mechanisms in the harness.
- val enableVerilatorSupport: String
Verilator support requires that we manually implement some SystemVerilog functions, such as
run_simulation
andsimulation_main
.Verilator support requires that we manually implement some SystemVerilog functions, such as
run_simulation
andsimulation_main
. These flags control the Verilator-specific code paths. - val enableVerilatorTrace: String
- val enableVpdTracingSupport: String
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- val supportsDelayInPublicFunctions: String
Verilator does not currently support delay (
#delay
) in DPI functions, so we omit the SystemVerilog definition of therun_simulation
function and instead provide a C implementation. - final def synchronized[T0](arg0: => T0): T0
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