object getVerilogString
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- verilog.scala
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- getVerilogString
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- def apply(gen: => RawModule, args: Array[String] = Array.empty, annotations: AnnotationSeq = Seq.empty): String
Returns a string containing the Verilog for the module specified by the target accepting arguments and annotations
Returns a string containing the Verilog for the module specified by the target accepting arguments and annotations
- gen
the module to be converted to Verilog
- args
arguments to be passed to the compiler
- annotations
annotations to be passed to the compiler
- returns
a string containing the Verilog for the module specified by the target
- def apply(gen: => RawModule): String
Returns a string containing the Verilog for the module specified by the target.
Returns a string containing the Verilog for the module specified by the target.
- gen
the module to be converted to Verilog
- returns
a string containing the Verilog for the module specified by the target
- final def phase: PhaseManager