c

chisel3.util

RRArbiter

class RRArbiter[T <: Data] extends LockingRRArbiter[T]

Hardware module that is used to sequence n producers into 1 consumer. Producers are chosen in round robin order.

Source
Arbiter.scala
Example:
  1. val arb = Module(new RRArbiter(UInt(), 2))
    arb.io.in(0) <> producer0.io.out
    arb.io.in(1) <> producer1.io.out
    consumer.io.in <> arb.io.out
Type Hierarchy
Ordering
  1. Alphabetic
  2. By Inheritance
Inherited
  1. RRArbiter
  2. LockingRRArbiter
  3. LockingArbiterLike
  4. Module
  5. ImplicitReset
  6. ImplicitClock
  7. RawModule
  8. BaseModule
  9. IsInstantiable
  10. HasId
  11. InstanceId
  12. AnyRef
  13. Any
Implicitly
  1. by BaseModuleExtensions
  2. by IsInstantiableExtensions
  3. by any2stringadd
  4. by StringFormat
  5. by Ensuring
  6. by ArrowAssoc
  1. Hide All
  2. Show All
Visibility
  1. Public
  2. Protected

Instance Constructors

  1. new RRArbiter(gen: T, n: Int)

    gen

    data type

    n

    number of inputs

Value Members

  1. lazy val choice: UInt
    Definition Classes
    LockingRRArbiterLockingArbiterLike
  2. def circuitName: String
    Definition Classes
    HasId
  3. final val clock: Clock
    Definition Classes
    Module
  4. final val definitionIdentifier: String

    Represents an eagerly-determined unique and descriptive identifier for this module

    Represents an eagerly-determined unique and descriptive identifier for this module

    Definition Classes
    BaseModule
  5. def desiredName: String

    The desired name of this module (which will be used in generated FIRRTL IR or Verilog).

    The desired name of this module (which will be used in generated FIRRTL IR or Verilog).

    The name of a module approximates the behavior of the Java Reflection getSimpleName method https://docs.oracle.com/javase/8/docs/api/java/lang/Class.html#getSimpleName-- with some modifications:

    - Anonymous modules will get an "_Anon" tag - Modules defined in functions will use their class name and not a numeric name

    Definition Classes
    BaseModule
    Note

    If you want a custom or parametric name, override this method.

  6. def endIOCreation()(implicit si: SourceInfo): Unit

    Disallow any more IO creation for this module.

    Disallow any more IO creation for this module.

    Definition Classes
    BaseModule
  7. def equals(that: Any): Boolean
    Definition Classes
    HasId → AnyRef → Any
  8. val gen: T
  9. def grant: Seq[Bool]
    Definition Classes
    LockingRRArbiterLockingArbiterLike
  10. lazy val grantMask: IndexedSeq[Bool]
    Definition Classes
    LockingRRArbiter
  11. def hasSeed: Boolean

    returns

    Whether either autoName or suggestName has been called

    Definition Classes
    HasId
  12. def hashCode(): Int
    Definition Classes
    HasId → AnyRef → Any
  13. def instanceName: String

    Signal name (for simulation).

    Signal name (for simulation).

    Definition Classes
    BaseModule → HasId → InstanceId
  14. val io: ArbiterIO[T]
    Definition Classes
    LockingArbiterLike
  15. lazy val lastGrant: UInt
    Definition Classes
    LockingRRArbiter
  16. val n: Int
  17. final lazy val name: String

    Legalized name of this module.

    Legalized name of this module.

    Definition Classes
    BaseModule
  18. def parentModName: String
    Definition Classes
    HasId → InstanceId
  19. def parentPathName: String
    Definition Classes
    HasId → InstanceId
  20. def pathName: String
    Definition Classes
    HasId → InstanceId
  21. final val reset: Reset
    Definition Classes
    Module
  22. def resetType: Type

    Override this to explicitly set the type of reset you want on this module , before any reset inference

    Override this to explicitly set the type of reset you want on this module , before any reset inference

    Definition Classes
    Module
  23. def suggestName(seed: => String): RRArbiter.this.type

    Takes the first seed suggested.

    Takes the first seed suggested. Multiple calls to this function will be ignored. If the final computed name conflicts with another name, it may get uniquified by appending a digit at the end.

    Is a higher priority than autoSeed, in that regardless of whether autoSeed was called, suggestName will always take precedence.

    seed

    The seed for the name of this component

    returns

    this object

    Definition Classes
    HasId
  24. final def toAbsoluteTarget: IsModule

    Returns a FIRRTL ModuleTarget that references this object

    Returns a FIRRTL ModuleTarget that references this object

    Definition Classes
    BaseModuleInstanceId
    Note

    Should not be called until circuit elaboration is complete

  25. def toDefinition: Definition[RRArbiter[T]]
    Implicit
    This member is added by an implicit conversion from RRArbiter[T] toBaseModuleExtensions[RRArbiter[T]] performed by method BaseModuleExtensions in chisel3.experimental.BaseModule.
    Definition Classes
    BaseModuleExtensions
  26. final def toNamed: ModuleName

    Returns a FIRRTL ModuleName that references this object

    Returns a FIRRTL ModuleName that references this object

    Definition Classes
    BaseModuleInstanceId
    Note

    Should not be called until circuit elaboration is complete

  27. final def toRelativeTarget(root: Option[BaseModule]): IsModule

    Returns a FIRRTL ModuleTarget that references this object, relative to an optional root.

    Returns a FIRRTL ModuleTarget that references this object, relative to an optional root.

    If root is defined, the target is a hierarchical path starting from root.

    If root is not defined, the target is a hierarchical path equivalent to toAbsoluteTarget.

    Definition Classes
    BaseModule
    Note

    If root is defined, and has not finished elaboration, this must be called within atModuleBodyEnd.

    ,

    The BaseModule must be a descendant of root, if it is defined.

    ,

    This doesn't have special handling for Views.

  28. final def toTarget: ModuleTarget

    Returns a FIRRTL ModuleTarget that references this object

    Returns a FIRRTL ModuleTarget that references this object

    Definition Classes
    BaseModuleInstanceId
    Note

    Should not be called until circuit elaboration is complete

  29. lazy val validMask: IndexedSeq[Bool]
    Definition Classes
    LockingRRArbiter

Shadowed Implicit Value Members

  1. def toInstance: Instance[RRArbiter[T]]
    Implicit
    This member is added by an implicit conversion from RRArbiter[T] toBaseModuleExtensions[RRArbiter[T]] performed by method BaseModuleExtensions in chisel3.experimental.BaseModule.
    Shadowing
    This implicitly inherited member is ambiguous. One or more implicitly inherited members have similar signatures, so calling this member may produce an ambiguous implicit conversion compiler error.
    To access this member you can use a type ascription:
    (rRArbiter: BaseModuleExtensions[RRArbiter[T]]).toInstance
    Definition Classes
    BaseModuleExtensions
  2. def toInstance: Instance[RRArbiter[T]]
    Implicit
    This member is added by an implicit conversion from RRArbiter[T] toIsInstantiableExtensions[RRArbiter[T]] performed by method IsInstantiableExtensions in chisel3.experimental.hierarchy.core.IsInstantiable.
    Shadowing
    This implicitly inherited member is ambiguous. One or more implicitly inherited members have similar signatures, so calling this member may produce an ambiguous implicit conversion compiler error.
    To access this member you can use a type ascription:
    (rRArbiter: IsInstantiableExtensions[RRArbiter[T]]).toInstance
    Definition Classes
    IsInstantiableExtensions