object ShiftRegisters
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- Reg.scala
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- macro def apply[T <: Data](in: T, n: Int, resetData: T, en: Bool): Seq[T]
Returns delayed input signal registers with reset initialization from 1 to n.
Returns delayed input signal registers with reset initialization from 1 to n.
- in
input to delay
- n
number of cycles to delay
- resetData
reset value for each register in the shift
- en
enable the shift
- macro def apply[T <: Data](in: T, n: Int): Seq[T]
Returns a sequence of delayed input signal registers from 1 to n.
Returns a sequence of delayed input signal registers from 1 to n.
Enable is assumed to be true.
- in
input to delay
- n
number of cycles to delay
- macro def apply[T <: Data](in: T, n: Int, en: Bool): Seq[T]
Returns a sequence of delayed input signal registers from 1 to n.
Returns a sequence of delayed input signal registers from 1 to n.
- in
input to delay
- n
number of cycles to delay
- en
enable the shift
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- def do_apply[T <: Data](in: T, n: Int)(implicit sourceInfo: SourceInfo): Seq[T]
- def do_apply[T <: Data](in: T, n: Int, en: Bool)(implicit sourceInfo: SourceInfo): Seq[T]
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