object Trace
The util that records the reference map from original Data/Module annotated in Chisel and final FIRRTL.
- Source
- Trace.scala
class Dut extends Module { val a = WireDefault(Bool()) Trace.traceName(a) } val annos = (new ChiselStage).execute(Seq(ChiselGeneratorAnnotation(() => new Dut))) val dut = annos.collectFirst { case DesignAnnotation(dut) => dut }.get.asInstanceOf[CollideModule] // get final reference of `a` Seq(ReferenceTarget("Dut", "Dut", Seq.empty, "a", Seq.empty)) val firrtlReferenceOfDutA = finalTarget(annos)(dut.a)
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- def finalTarget(annos: AnnotationSeq)(x: HasId): Seq[CompleteTarget]
Get
CompleteTarget
of the targetx
forannos
.Get
CompleteTarget
of the targetx
forannos
. This API can be used to find the final reference to a signal or module which is marked bytraceName
- def finalTargetMap(annos: AnnotationSeq): Map[CompleteTarget, Seq[CompleteTarget]]
Get all traced signal/module for
annos
This API can be used to gather all final reference to the signal or module which is marked bytraceName
- def finalize(): Unit
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- def traceName(x: Data): Unit
Trace a Data name.
Trace a Data name. This does NOT add "don't touch" semantics to the traced data. If you want this behavior, use an explicit chisel3.dontTouch.
- def traceName(x: RawModule): Unit
Trace a Instance name.
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