object doNotDedup
Marks that a module to be ignored in Dedup Transform in Firrtl pass
- Source
- Annotation.scala
def fullAdder(a: UInt, b: UInt, myName: String): UInt = { val m = Module(new Module { val io = IO(new Bundle { val a = Input(UInt(32.W)) val b = Input(UInt(32.W)) val out = Output(UInt(32.W)) }) override def desiredName = "adder_" + myNname io.out := io.a + io.b }) doNotDedup(m) m.io.a := a m.io.b := b m.io.out } class AdderTester extends Module with ConstantPropagationTest { val io = IO(new Bundle { val a = Input(UInt(32.W)) val b = Input(UInt(32.W)) val out = Output(Vec(2, UInt(32.W))) }) io.out(0) := fullAdder(io.a, io.b, "mod1") io.out(1) := fullAdder(io.a, io.b, "mod2") }
Example:
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Marks a module to be ignored in Dedup Transform in Firrtl
Marks a module to be ignored in Dedup Transform in Firrtl
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The module to be marked
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Unmodified signal
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